CVE-2026-89916

CVE-2026-89916

Critical · published September 16, 2026

CVSS v3.1
9.3
EPSS
0%
Percentile
8.6
In the wild
Unconfirmed
What it is

In the Linux kernel, the following vulnerability has been resolved:

KVM: arm64: Make VNCR invalidation participate in MMU invalidation retry

A VNCR TLB invalidation can occur on one vcpu while another vcpu is

faulting in this same page. Without correctly handling this, we can

end up with the following scenario:

- vcpu A walks the PTs to translate VNCR

- before vcpu A is able to grab the MMU lock to insert the TLB,

vcpu B updates the S1 PTs with an invalid entry, and issues

a TLBI S1E2 for this VA

- vcpu A inserts the TLB for something that is now invalid

This isn't a new problem, and we manage S2 by having the MMU notifier

to bump up mmu_invalidate_seq on invalidation so that the fault can be

replayed.

We can perform something similar here, and extend invalidate_vncr_va() to

update the same counter, clearly indicating that the context has

changed under our feet. This is safe as the invalidation always happen

while holding the MMU lock for write, and that we sample the sequence

number before walking S1.

The record
Technical detail
CVSS v3.1
9.3 · CRITICAL
Vector
CVSS:3.1/AV:L/AC:L/PR:N/UI:N/S:C/C:H/I:H/A:H
CVSS v4.0
Not supplied
EPSS
0.00194 · 8.6th percentile
Published
2026-09-16T15:17Z
References (3)
EPSS history
Timeline
  • 18 SEP 04:02Z
    EPSS moved — → 0%
    epss
  • 16 SEP 10:32Z
    KVM: arm64: Make VNCR invalidation participate in MMU invalidation retry
    cvelistv5