CVE-2026-68329CWE-362

CVE-2026-68329

High · published August 10, 2026

CVSS v3.1
8.8
EPSS
0%
Percentile
2.1
In the wild
Unconfirmed
What it is

In the Linux kernel, the following vulnerability has been resolved:

iommu/amd: Wait for completion instead of returning early in iommu_completion_wait()

need_sync is a per-IOMMU flag shared by all domains and devices behind

that IOMMU. It is set whenever a command is queued with sync == true and

cleared when a completion-wait (CWAIT) command is queued. However, a

cleared need_sync only means that a covering CWAIT has been queued, not

that all previously queued commands have actually completed in hardware.

iommu_completion_wait() read need_sync locklessly and returned early

when it was false. This breaks the "block until all previously queued

commands have completed" contract in a multi-CPU scenario:

CPU2: queue inv-B => need_sync = true

CPU1: queue CWAIT(N); need_sync = false; then wait_on_sem(N)

CPU2: read need_sync == false => return 0 (no wait!)

CPU2 returns without waiting for any sequence number even though its

inv-B may not have completed yet (CWAIT(N), queued after inv-B, has not

been signaled). CPU2 then proceeds to, for example, free page-table

pages while the IOMMU can still walk stale translations, opening a

use-after-free window. This is a logical race in the meaning of the

flag, not a memory-visibility issue, so barriers alone do not help.

Fix it without losing the optimization of avoiding redundant CWAIT

commands: take iommu->lock before testing need_sync, and when it is

false do not return early but wait for the last allocated sequence

number (cmd_sem_val). Since need_sync == false implies no sync command

was queued after the last CWAIT, that CWAIT is FIFO-ordered after every

not-yet-completed command, so waiting for its sequence number guarantees

all prior commands (possibly queued by another CPU) have completed. The

common path with pending work is unchanged and no extra hardware command

is issued.

The record
Technical detail
CVSS v3.1
8.8 · HIGH
Vector
CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:C/C:H/I:H/A:H
CVSS v4.0
Not supplied
EPSS
0.00126 · 2.1th percentile
Weakness
CWE-362 · Concurrent Execution using Shared Resource with Improper Synchronization ('Race Condition')
Published
2026-08-10T17:20Z
References (5)
EPSS history
Timeline
  • 10 AUG 12:03Z
    iommu/amd: Wait for completion instead of returning early in iommu_completion_wait()
    cvelistv5