CVE-2026-46148

CVE-2026-46148

Medium · published May 28, 2026

CVSS v3.1
5.5
EPSS
0%
Percentile
5.0
In the wild
Unconfirmed
What it is

In the Linux kernel, the following vulnerability has been resolved:

spi: microchip-core-qspi: control built-in cs manually

The coreQSPI IP supports only a single chip select, which is

automagically operated by the hardware - set low when the transmit

buffer first gets written to and set high when the number of bytes

written to the TOTALBYTES field of the FRAMES register have been sent on

the bus. Additional devices must use GPIOs for their chip selects.

It was reported to me that if there are two devices attached to this

QSPI controller that the in-built chip select is set low while linux

tries to access the device attached to the GPIO.

This went undetected as the boards that connected multiple devices to

the SPI controller all exclusively used GPIOs for chip selects, not

relying on the built-in chip select at all. It turns out that this was

because the built-in chip select, when controlled automagically, is set

low when active and high when inactive, thereby ruling out its use for

active-high devices or devices that need to transmit with the chip

select disabled.

Modify the driver so that it controls chip select directly, retaining

the behaviour for mem_ops of setting the chip select active for the

entire duration of the transfer in the exec_op callback. For regular

transfers, implement the set_cs callback for the core to use.

As part of this, the existing setup callback, mchp_coreqspi_setup_op(),

is removed. Modifying the CLKIDLE field is not safe to do during

operation when there are multiple devices, so this code is removed

entirely. Setting the MASTER and ENABLE fields is something that can be

done once at probe, it doesn't need to be re-run for each device.

Instead the new setup callback sets the built-in chip select to its

inactive state for active-low devices, as the reset value of the chip

select in software controlled mode is low.

The record
Technical detail
CVSS v3.1
5.5 · MEDIUM
Vector
CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:U/C:N/I:N/A:H
CVSS v4.0
Not supplied
EPSS
0.00162 · 5.0th percentile
Published
2026-05-28T14:16Z
Affected products (4)
ProductVersionsFixed in
linux/linux_kernel≥ 6.1, < 6.18.306.18.30
linux/linux_kernel≥ 6.19, < 7.0.77.0.7
linux/linux_kernelall versions—
linux/linux_kernelall versions—
References (5)
EPSS history
Timeline
  • 28 MAY 09:36Z
    spi: microchip-core-qspi: control built-in cs manually
    cvelistv5