CVE-2025-54520CWE-1247
Improper Protection Against Voltage and Clock Glitches in FPGA devices, could allow an attacker with physical access to undervolt the platform resulting in a…
High · published September 24, 2025
What it is
Improper Protection Against Voltage and Clock Glitches in FPGA devices, could allow an attacker with physical access to undervolt the platform resulting in a loss of confidentiality.
The record
Technical detail
- CVSS v4.0
- 8.6 · HIGH
- Vector
- CVSS:4.0/AV:P/AC:L/AT:N/PR:N/UI:N/VC:H/VI:H/VA:H/SC:H/SI:H/SA:H
- EPSS
- 0.00197 · 9.4th percentile
- Weakness
- CWE-1247 · Improper Protection Against Voltage and Clock Glitches
- Published
- 2025-09-24T21:29Z
EPSS history
Timeline