CVE-2025-37929

arm64: errata: Add missing sentinels to Spectre-BHB MIDR arrays

published May 20, 2025

CVSS
—
EPSS
0%
Percentile
9.8
In the wild
Unconfirmed
What it is

In the Linux kernel, the following vulnerability has been resolved:

arm64: errata: Add missing sentinels to Spectre-BHB MIDR arrays

Commit a5951389e58d ("arm64: errata: Add newer ARM cores to the

spectre_bhb_loop_affected() lists") added some additional CPUs to the

Spectre-BHB workaround, including some new arrays for designs that

require new 'k' values for the workaround to be effective.

Unfortunately, the new arrays omitted the sentinel entry and so

is_midr_in_range_list() will walk off the end when it doesn't find a

match. With UBSAN enabled, this leads to a crash during boot when

is_midr_in_range_list() is inlined (which was more common prior to

c8c2647e69be ("arm64: Make  _midr_in_range_list() an exported

function")):

| Internal error: aarch64 BRK: 00000000f2000001 [#1] PREEMPT SMP

| pstate: 804000c5 (Nzcv daIF +PAN -UAO -TCO -DIT -SSBS BTYPE=--)

| pc : spectre_bhb_loop_affected+0x28/0x30

| lr : is_spectre_bhb_affected+0x170/0x190

| [...]

| Call trace:

| spectre_bhb_loop_affected+0x28/0x30

| update_cpu_capabilities+0xc0/0x184

| init_cpu_features+0x188/0x1a4

| cpuinfo_store_boot_cpu+0x4c/0x60

| smp_prepare_boot_cpu+0x38/0x54

| start_kernel+0x8c/0x478

| __primary_switched+0xc8/0xd4

| Code: 6b09011f 54000061 52801080 d65f03c0 (d4200020)

| ---[ end trace 0000000000000000 ]---

| Kernel panic - not syncing: aarch64 BRK: Fatal exception

Add the missing sentinel entries.

The record
Technical detail
CVSS
Not scored
CVSS v4.0
Not supplied
EPSS
0.00204 · 9.8th percentile
Published
2025-05-20T15:21Z
EPSS history
Timeline
  • 20 MAY 15:21Z
    arm64: errata: Add missing sentinels to Spectre-BHB MIDR arrays
    cvelistv5