CVE-2025-37901

irqchip/qcom-mpm: Prevent crash when trying to handle non-wake GPIOs

published May 20, 2025

CVSS
—
EPSS
0%
Percentile
11.1
In the wild
Unconfirmed
What it is

In the Linux kernel, the following vulnerability has been resolved:

irqchip/qcom-mpm: Prevent crash when trying to handle non-wake GPIOs

On Qualcomm chipsets not all GPIOs are wakeup capable. Those GPIOs do not

have a corresponding MPM pin and should not be handled inside the MPM

driver. The IRQ domain hierarchy is always applied, so it's required to

explicitly disconnect the hierarchy for those. The pinctrl-msm driver marks

these with GPIO_NO_WAKE_IRQ. qcom-pdc has a check for this, but

irq-qcom-mpm is currently missing the check. This is causing crashes when

setting up interrupts for non-wake GPIOs:

root@rb1:~# gpiomon -c gpiochip1 10

irq: IRQ159: trimming hierarchy from :soc@0:interrupt-controller@f200000-1

Unable to handle kernel paging request at virtual address ffff8000a1dc3820

Hardware name: Qualcomm Technologies, Inc. Robotics RB1 (DT)

pc : mpm_set_type+0x80/0xcc

lr : mpm_set_type+0x5c/0xcc

Call trace:

mpm_set_type+0x80/0xcc (P)

qcom_mpm_set_type+0x64/0x158

irq_chip_set_type_parent+0x20/0x38

msm_gpio_irq_set_type+0x50/0x530

__irq_set_trigger+0x60/0x184

__setup_irq+0x304/0x6bc

request_threaded_irq+0xc8/0x19c

edge_detector_setup+0x260/0x364

linereq_create+0x420/0x5a8

gpio_ioctl+0x2d4/0x6c0

Fix this by copying the check for GPIO_NO_WAKE_IRQ from qcom-pdc.c, so that

MPM is removed entirely from the hierarchy for non-wake GPIOs.

The record
Technical detail
CVSS
Not scored
CVSS v4.0
Not supplied
EPSS
0.00214 · 11.1th percentile
Published
2025-05-20T15:21Z
EPSS history
Timeline
  • 20 MAY 15:21Z
    irqchip/qcom-mpm: Prevent crash when trying to handle non-wake GPIOs
    cvelistv5