CVE-2024-56760

PCI/MSI: Handle lack of irqdomain gracefully

Medium · published January 6, 2025

CVSS v3.1
5.5
EPSS
0%
Percentile
10.1
In the wild
Unconfirmed
What it is

In the Linux kernel, the following vulnerability has been resolved:

PCI/MSI: Handle lack of irqdomain gracefully

Alexandre observed a warning emitted from pci_msi_setup_msi_irqs() on a

RISCV platform which does not provide PCI/MSI support:

WARNING: CPU: 1 PID: 1 at drivers/pci/msi/msi.h:121 pci_msi_setup_msi_irqs+0x2c/0x32

__pci_enable_msix_range+0x30c/0x596

pci_msi_setup_msi_irqs+0x2c/0x32

pci_alloc_irq_vectors_affinity+0xb8/0xe2

RISCV uses hierarchical interrupt domains and correctly does not implement

the legacy fallback. The warning triggers from the legacy fallback stub.

That warning is bogus as the PCI/MSI layer knows whether a PCI/MSI parent

domain is associated with the device or not. There is a check for MSI-X,

which has a legacy assumption. But that legacy fallback assumption is only

valid when legacy support is enabled, but otherwise the check should simply

return -ENOTSUPP.

Loongarch tripped over the same problem and blindly enabled legacy support

without implementing the legacy fallbacks. There are weak implementations

which return an error, so the problem was papered over.

Correct pci_msi_domain_supports() to evaluate the legacy mode and add

the missing supported check into the MSI enable path to complete it.

The record
Technical detail
CVSS v3.1
5.5 · MEDIUM
Vector
CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:U/C:N/I:N/A:H
CVSS v4.0
Not supplied
EPSS
0.00206 · 10.1th percentile
Published
2025-01-06T16:20Z
EPSS history
Timeline
  • 06 JAN 16:20Z
    PCI/MSI: Handle lack of irqdomain gracefully
    cvelistv5