CVE-2023-52608

firmware: arm_scmi: Check mailbox/SMT channel for consistency

published March 13, 2024

CVSS
—
EPSS
0%
Percentile
6.6
In the wild
Unconfirmed
What it is

In the Linux kernel, the following vulnerability has been resolved:

firmware: arm_scmi: Check mailbox/SMT channel for consistency

On reception of a completion interrupt the shared memory area is accessed

to retrieve the message header at first and then, if the message sequence

number identifies a transaction which is still pending, the related

payload is fetched too.

When an SCMI command times out the channel ownership remains with the

platform until eventually a late reply is received and, as a consequence,

any further transmission attempt remains pending, waiting for the channel

to be relinquished by the platform.

Once that late reply is received the channel ownership is given back

to the agent and any pending request is then allowed to proceed and

overwrite the SMT area of the just delivered late reply; then the wait

for the reply to the new request starts.

It has been observed that the spurious IRQ related to the late reply can

be wrongly associated with the freshly enqueued request: when that happens

the SCMI stack in-flight lookup procedure is fooled by the fact that the

message header now present in the SMT area is related to the new pending

transaction, even though the real reply has still to arrive.

This race-condition on the A2P channel can be detected by looking at the

channel status bits: a genuine reply from the platform will have set the

channel free bit before triggering the completion IRQ.

Add a consistency check to validate such condition in the A2P ISR.

The record
Technical detail
CVSS
Not scored
CVSS v4.0
Not supplied
EPSS
0.00174 · 6.6th percentile
Published
2024-03-13T14:01Z
EPSS history
Timeline
  • 13 MAR 14:01Z
    firmware: arm_scmi: Check mailbox/SMT channel for consistency
    cvelistv5