CVE-2022-50720

x86/apic: Don't disable x2APIC if locked

published December 24, 2025

CVSS
—
EPSS
0%
Percentile
14.5
In the wild
Unconfirmed
What it is

In the Linux kernel, the following vulnerability has been resolved:

x86/apic: Don't disable x2APIC if locked

The APIC supports two modes, legacy APIC (or xAPIC), and Extended APIC

(or x2APIC). X2APIC mode is mostly compatible with legacy APIC, but

it disables the memory-mapped APIC interface in favor of one that uses

MSRs. The APIC mode is controlled by the EXT bit in the APIC MSR.

The MMIO/xAPIC interface has some problems, most notably the APIC LEAK

[1]. This bug allows an attacker to use the APIC MMIO interface to

extract data from the SGX enclave.

Introduce support for a new feature that will allow the BIOS to lock

the APIC in x2APIC mode. If the APIC is locked in x2APIC mode and the

kernel tries to disable the APIC or revert to legacy APIC mode a GP

fault will occur.

Introduce support for a new MSR (IA32_XAPIC_DISABLE_STATUS) and handle

the new locked mode when the LEGACY_XAPIC_DISABLED bit is set by

preventing the kernel from trying to disable the x2APIC.

On platforms with the IA32_XAPIC_DISABLE_STATUS MSR, if SGX or TDX are

enabled the LEGACY_XAPIC_DISABLED will be set by the BIOS. If

legacy APIC is required, then it SGX and TDX need to be disabled in the

BIOS.

[1]: https://aepicleak.com/aepicleak.pdf

The record
Technical detail
CVSS
Not scored
CVSS v4.0
Not supplied
EPSS
0.00242 · 14.5th percentile
Published
2025-12-24T12:22Z
EPSS history
Timeline
  • 24 DEC 12:22Z
    x86/apic: Don't disable x2APIC if locked
    cvelistv5